1. Field
One embodiment of the present invention relates to a gamma correction circuit, a gamma correction method, and an image display apparatus which use parameters supplied from a plurality of memories.
2. Description of the Related Art
In recent years, a large number of digital devices have been developed and used, and a large number of techniques in various fields are known for video processing using digital techniques. As one of the techniques, a gamma correction process which is a video processing technique is known. More specifically, a numerical called “gamma (γ)” used to express a response characteristic of a gradient of an image is used. However, for example, on a display, a brightness of a surface exhibits an exponential change without being in proportion to an input voltage. When the input voltage is small, the brightness is moderate. When the input voltage becomes large, the change in brightness sharply increases. When this relationship describes a curve having a power of 2.2, a gamma is given as 2.2. Gamma=1 denotes a straight line. Such a gamma correction process is used in, for example, a video processing unit such as of a digital television apparatus.
Patent Document (Jpn. Pat. Appln. KOKAI Publication No. 2005-121767) discloses a gamma conversion circuit which performs first gamma conversion and second gamma conversion to a video signal and in which outputs from first and second conversion circuits are switched by a selection circuit every frame/pixel. In this manner, a plurality of gamma conversion processes can be performed.
However, since the conventional art described in Patent Document 1 uses a plurality of gamma correction processes, a plurality of gamma correction circuits are necessary. Furthermore, since the gamma correction processes are normally realized by a table scheme using a plurality of SRAMs, a circuit scale disadvantageously increases.
In the conventional art in Patent Document 1, when a video signal is read from a normal serial storage unit (ROM or the like), parameter information can be read at only a rate of, for example, about 400 kbyte/s by a data transmission method called I2CBus (I squared C Bus). For this reason, disadvantageously plural pieces of parameter information cannot be instantaneously switched and processed.